d:\Programming\github\vunit\vunit\vhdl\check\test\test_support.vhd:297:5:@0ms:(report note): 
-----------
Test result
-----------
d:\Programming\github\vunit\vunit\vhdl\check\test\test_support.vhd:303:5:@0ms:(report note): Number of assertions: 340
d:\Programming\github\vunit\vunit\vhdl\check\test\test_support.vhd:304:5:@0ms:(report note): Number of errors: 0
simulation stopped @0ms with status 0
