# vsim -L lib -L vunit_lib -modelsimini d:/Programming/github/vunit/vunit/vhdl/check/vunit_out/modelsim/modelsim.ini -onfinish stop -quiet -t ps -wlf d:/Programming/github/vunit/vunit/vhdl/check/vunit_out/tests/lib.tb_check_implication/modelsim/vsim.wlf {-g/tb_check_implication/runner_cfg="enabled_test_cases : Test sequential checkers should fail on true implies false but pass on other inputs,,Test should be possible to use concurrently,,Test should be possible to use concurrently with negative active clock edge,,Test should be possible to use concurrently with custom checker,,Test should handle weak known meta values as known values and others as unknowns,,Test should pass on true implies false when not enabled,output path : d::/Programming/github/vunit/vunit/vhdl/check/vunit_out/tests/lib.tb_check_implication/,active python runner : true"} lib.tb_check_implication(test_fixture) 
# ** Note: 
# -----------
# Test result
# -----------
#    Time: 331 ns  Iteration: 0  Instance: /tb_check_implication
# ** Note: Number of assertions: 101
#    Time: 331 ns  Iteration: 0  Instance: /tb_check_implication
# ** Note: Number of errors: 0
#    Time: 331 ns  Iteration: 0  Instance: /tb_check_implication
# Break in Subprogram vunit_stop at D:/Programming/github/vunit/vunit/vhdl/run/src/stop_body_2008.vhd line 10
# Stopped at D:/Programming/github/vunit/vunit/vhdl/run/src/stop_body_2008.vhd line 10 
